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this is information on a product in full production. july 2014 docid18415 rev 5 1/16 STL56N3LLH5 n-channel 30 v, 0.0076 ? typ., 56 a stripfet? h5 power mosfet in a powerflat? 5x6 package datasheet ? production data figure 1. internal schematic diagram features ? low on-resistance r ds(on) ? high avalanche ruggedness ? low gate drive power loss applications ? switching applications description this device is an n-channel power mosfet developed using stmicroelectronics? stripfet? h5 technology. the device has been optimized to achieve very low on-state resistance, contributing to a fom that is among the best in its class. powerflat? 5x6 1 2 3 4 $0y ' * 6 order code v ds r ds(on) max i d STL56N3LLH5 30 v 0.009 ? 56 a table 1. device summary order code marking package packaging STL56N3LLH5 56n3lh5 powerflat? 5x6 tape and reel www.st.com
contents STL56N3LLH5 2/16 docid18415 rev 5 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
docid18415 rev 5 3/16 STL56N3LLH5 electrical ratings 16 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v ds drain-source voltage 30 v v gs gate-source voltage +22 / -20 v i d (1) 1. the value is rated according to r thj-c drain current (continuous) at t c = 25 c 56 a i d (1) drain current (continuous) at t c = 100 c 37 a i d (2) 2. the value is rated according to r thj-pcb drain current (continuous) at t pcb = 25 c 15 a i d (2) drain current (continuous) at t pcb =100c 10 a i dm (1)(3) 3. pulse width limited by safe operating area drain current (pulsed) 224 a i dm (2)(3) drain current (pulsed) 60 a p tot (1) total dissipation at t c = 25c 62.5 w p tot (2) total dissipation at t pcb = 25c 4 w e as (4) 4. starting t j = 25 c, i d = 56 a, v dd = 50 v single pulse avalanche energy 150 mj t j t stg operating junction temperature storage temperature -55 to 150 c table 3. thermal resistance symbol parameter value unit r thj-case thermal resistance junction-case 2 c/w r thj-pcb (1) 1. when mounted on fr-4 board of 1inch2, 2oz cu, t < 10 sec thermal resistance junction-pcb 31.3 c/w
electrical characteristics STL56N3LLH5 4/16 docid18415 rev 5 2 electrical characteristics (t case = 25 c unless otherwise specified) table 4. on/off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage v gs = 0, i d = 250 a 30 v i dss zero gate voltage drain current v gs = 0, v ds = 30 v, 1 a v gs = 0 v ds = 30 v, t c = 125 c 10 a i gss gate body leakage current v ds = 0, v gs = +22 / -20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 2.5 v r ds(on) static drain-source on- resistance v gs = 10 v, i d = 7.5 a 0.0076 0.009 ? v gs = 4.5 v, i d = 7.5 a 0.0099 0.0112 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds =25 v, f=1 mhz, v gs =0 - 950 pf c oss output capacitance - 193 pf c rss reverse transfer capacitance -27 pf q g total gate charge v dd =15 v, i d = 15 a v gs =4.5 v figure 14 -6.510nc q gs gate-source charge - 3.3 nc q gd gate-drain charge - 2.4 nc r g gate input resistance f = 1 mhz, gate dc bias = 0, test signal level = 20 mv, i d = 0 -1.72.5 ?
docid18415 rev 5 5/16 STL56N3LLH5 electrical characteristics 16 table 6. switching times symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =15 v, i d = 7.5 a, r g =4.7 ? , v gs =10 v figure 13 -10.8- ns t r rise time - 15.6 - ns t d(off) turn-off delay time - 14.2 - ns t f fall time - 6 - ns table 7. source drain diode symbol parameter test conditions min typ. max unit i sd source-drain current - 56 a i sdm (1) 1. pulse width limited by safe operating area source-drain current (pulsed) - 224 a v sd (2) 2. pulsed: pulse duration= 300 s, duty cycle 1.5% forward on voltage i sd = 15 a, v gs =0 - 1.1 v t rr reverse recovery time i sd = 15 a, di/dt = 100 a/s, v dd =25 v, tj=150 c -2036ns q rr reverse recovery charge - 10 18 nc i rrm reverse recovery current - 1 a
electrical characteristics STL56N3LLH5 6/16 docid18415 rev 5 2.1 electrical characteristics (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. normalized v (br)dss vs temperature figure 7. static drain-source on-resistance i d 10 1 0.1 0.1 1 v ds (v) 10 (a) operation in this area is limited by max r ds(on) 1s tj=150c tc=25c single pulse 100 10s 100s am010329v1 / 6lqjohsxovh . w s v *,3*6$ i d 60 40 20 0 0 2 v ds (v) 4 (a) 1 3 80 100 5v 6v 4v v gs =10v 120 140 3v am10330v1 i d 60 40 20 0 0 4 v gs (v) 8 (a) 2 6 80 100 120 140 v ds =3v am10331v1 v (br)dss -75 t j (c) (norm) -25 75 25 125 0.92 0.96 1.00 1.04 1.08 i d =1ma am10334v1 r ds(on) 9 7 5 3 4 8 i d (a) (m ) 6 10 11 13 v gs =10v 12 14 am10335v1
docid18415 rev 5 7/16 STL56N3LLH5 electrical characteristics 16 figure 8. gate charge vs gate-source voltage figure 9. capacitance variations figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on-resistance vs temperature figure 12. source-drain diode forward characteristics v gs 3 2 1 0 0 2 q g (nc) (v) 8 4 4 6 5 v dd =15v i d =15a 6 am10332v1 c 900 600 300 0 0 10 v ds (v) (pf) 5 1200 15 ciss coss crss 20 25 am10333v1 v gs(th) 1.0 0.8 0.6 0.4 -75 t j (c) (norm) -25 1.2 75 25 125 i d =250a am10336v1 r ds(on) 1.6 1.2 0.8 0.4 -75 t j (c) (norm) -25 75 25 125 1.6 i d =7.5a v gs =10v am10337v1 v sd 4 8 i sd (a) (v) 6 14 10 12 0.5 0.6 0.7 0.8 0.9 t j =-55c t j =150c t j =25c am10338v1
test circuits STL56N3LLH5 8/16 docid18415 rev 5 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times figure 16. unclamped inductive load test circuit figure 17. unclamped inductive waveform figure 18. switching time waveform am01468v1 v gs p w v d r g r l d.u.t. 2200 f 3.3 f v dd am01469v1 v dd 47k 1k 47k 2.7k 1k 12v v i =20v=v gmax 2200 f p w i g =const 100 100nf d.u.t. v g am01470v1 a d d.u.t. s b g 25 a a b b r g g fast diode d s l=100 h f 3.3 1000 f v dd am01471v1 v i p w v d i d d.u.t. l 2200 f 3.3 f v dd am01472v1 v (br)dss v dd v dd v d i dm i d am01473v1 v ds t on td on td off t off t f t r 90% 10% 10% 0 0 90% 90% 10% v gs
docid18415 rev 5 9/16 STL56N3LLH5 package mechanical data 16 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data STL56N3LLH5 10/16 docid18415 rev 5 figure 19. powerflat? 5x6 type s-r drawing pin 1 identification pin 1 identification . side view top view bottom view 8231817_rev_i_type s-r 5 8 41 4 1 5 8
docid18415 rev 5 11/16 STL56N3LLH5 package mechanical data 16 table 8. powerflat 5x6 type s-r mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 d 5.00 5.20 5.40 d2 4.11 4.31 e 5.95 6.15 6.35 e1.27 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 k 1.275 1.575 l 0.60 0.80
package mechanical data STL56N3LLH5 12/16 docid18415 rev 5 figure 20. recommended footprint note: all dimensions are in mm footprint
docid18415 rev 5 13/16 STL56N3LLH5 packaging mechanical data 16 5 packaging mechanical data figure 21. powerflat? 5x6 tape (a) figure 22. powerflat? 5x6 package orientation in carrier tape. a. all dimensions are in millimeters. measured from centerline of sprocket hole to centerline of pocket. cumulative tolerance of 10 sprocket holes is 0.20 . measured from centerline of sprocket hole to centerline of pocket. (i) (ii) (iii) 2 2.00.1 (i) bo (5.300.1) ko (1.200.1) 0.05) ?1.5 min. ?1.550.05 p ao(6.300.1) f(5.500.1)(iii) w(12.000.3) 1.750.1 4.00.1 (ii) p 0 y y section y-y c l p1(8.000.1) do d1 e 1 (0.30 t ref.r0.50 ref 0.20 base and bulk quantity 3000 pcs 8234350_tape_rev_c pin 1 identification
packaging mechanical data STL56N3LLH5 14/16 docid18415 rev 5 figure 23. powerflat? 5x6 reel 2.20 ?21.2 13.00 core detail 2.50 1.90 r0.60 77 128 ?a r1.10 2.50 4.00 r25.00 part no. w1 w2 18.4 (max) w3 06 ps esd logo at t e n t i o n observe precautions for handling electrostatic sensitive devices 11.9/15.4 12.4 (+2/-0) a 330 (+0/-4.0) all dimensions are in millimeters ?n 178(2.0) 8234350_reel_rev_c
docid18415 rev 5 15/16 STL56N3LLH5 revision history 16 6 revision history table 9. document revision history date revision changes 24-jan-2011 1 first release. 01-jul-2011 2 document status promoted from preliminary data to datasheet. 27-apr-2012 3 added e as value in table 2: absolute maximum ratings . updated table 3: thermal resistance , table 4: on/off states , table 5: dynamic and table 7: source drain diode . minor text changes. 13-feb-2013 4 ? added: section 5: packaging mechanical data . ? updated section 4: package mechanical data . 25-jul-2014 5 ? modified: title, features and description in cover page ? modified: i sd and i sdm max values in table 7 ? updated: figure 2 and 3 ? updated: figure 13 , 14 , 15 and 16 ? updated: section 4: package mechanical data ? minor text changes
STL56N3LLH5 16/16 docid18415 rev 5 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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